1. Field of the Invention
The present invention relates to a circuit arrangement for machine character recognition having a classifier following a sampler and an editor, the classifier calculating an assignment of the respectively-sampled character to one of a total of Z character classes on the basis of stored classifier coefficients.
2. Description of the Prior Art
In modern data technology, machine character recognition is gaining increasing significance, in conjunction with data acquisition and data input. For this purpose, in the interest of low substitution and rejection rates, high requirements are made of the recognition certainty. It is therefore necessary for certain character recognition that not only the characteristic features of the character to be classified be evaluated in view of applicability to a specific character class but, rather, that its characteristic differences, in comparison to the representatives of all other classes, be likewise evaluated. This is still relatively simple given a set of characters of approximately 10 characters to be recognized, for example for the numerals 0-9, particularly with standardized character fonts, OCR-A and OCR-B.
If, in contrast thereto, the set of characters to be respectively evaluated by a classifier is increased, then the classification results deteriorate approximately quadratically as a function of the overall number of characters to be distinguished, i.e. a classification of, for example, 30 character classes produces values of the magnitudes characterizing the quality of the recognition which are poorer by approximately the factor 9 than a classification of only 10 classes of characters. Moreover, upon employment of a non-linear classifier system, considerable problems arise with respect to the chronological expense, because approximately 500-1000 computing operations per character class are required for the calculation of the classifier values necessary for the recognition of the individual characters. Since this occurs to the detriment to the reading rate, the computational work would of necessity have to be distributed to a plurality of computational units which would significantly increase the circuit expense and, therefore, the price of the classifier.